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  1 copyright ? cirrus logic, inc. 2004 (all rights reserved) cirrus logic, inc. http://www.cirrus.com 6/23/04 errata: CS5378 rev a errata (reference CS5378 data sheet revision ds639pp1 dated feb ?04) erratum #1: serial port has limited ss:eecs assertion time after data collection start- ed. description: applies only when a microcontroller tries to reconfigure the CS5378 after data collection has started. the initial microcontroller configuration and the eeprom configuration mode are not affected since they set the CS5378 configuration before data collection begins. when reconfiguring the CS5378 after data collection has started, asserting ss:eecs for longer than two output data periods (4 ms for 500 sps output rate, 2 ms for 1000 sps, etc.) will lock the serial data output r equiring a device reset and reconfiguration. work around: after data collection starts, limit serial configuration command transaction times to less than two output data periods. erratum #2: reading gpio pins requires 5 v or lower vddpad power supply. description: if the vddpad power supply is at the maximum 5.25 v and the vddcore is at the minimum 2.5 v, reading gpio pin values from the gpio register is not reliable. work around: use 5 v or lower power supply inputs to vddpad, 3.3 v is recommended. er639a1 jun ?04 contacting cirrus logic support for a complete listing of direct distributor, sales, and sales representative contacts, visit the cirrus logic website at http://www.cirrus.com/
2 er639a1 erratum #3: esd failures above 1.5 kv human body model, 150 v machine model. description: CS5378 devices pass 1.5 kv hbm and 150 v mm, but fail 2 kv hbm and 200 v mm. cirrus specification is 2 kv hbm and 200 v mm minimum. work around: use good esd handling procedures. erratum #4: all zero initial data write to the serial data fifo. description: initializing the digital filter with the ?filter start? command causes a false write into the output data fifo. the first serial data available from the sd port is an all zero word followed by the first digital filter result. at the first serial data read, the fifo contains more data than expected. work around: the first serial data trans action should send 8 x 32 = 256 clocks into sdclk to purge all data in the output fifo. later serial data read transactions can expect the digital filter result only.


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